S-Curve Engineering for ON-State Performance Using Anti-Ferroelectric/Ferroelectric Stack Negative-Capacitance FinFET

Stack Height Analysis for FinFET Logic and Circuit

FinFET has appeared to be a good candidate for further extending the technology to the nanoscale regime due to its excellent electrostatic properties and comparative ease of fabrication. Due to little/no body effect in FinFET devices, there is a good chance of increasing the stack height to enable more complex gates and reduce logic depth, which could further improve metrics, like performance. ...

Performance Improvement of FinFET using Nitride Spacer

The Double Gate FinFET has been designed for 90nm as an alternative solution to bulk devices. The FinFET with independent gate (IDG) structure is designed to control Vth. When the Vth is controlled the leakage current can be decreased by improving its current driving capability. The metal used for the front gate and back gate is TiN. Here the device performance is compared using nitride spacer ...

Solid-State Memcapacitive System with Negative and Diverging Capacitance

Using State Diagrams for Hilbert Curve

The Hilbert Curve describes a method of mapping between one and n dimensions. Such mappings are of interest in a number of application domains including image processing and, more recently, in the indexing of multi-dimensional data. Relatively little work, however, has been devoted to techniques for mapping in more that 2 dimensions. This paper presents a technique for constructing state diagra...

Piezoelectric Negative Capacitance

A thermodynamic model was constructed to analyze the negative capacitance effect in the presence of piezoelectricity. The model demonstrated that while piezoelectricity can lead to negative capacitance in principle, it is not strong enough in practice due to the unphysical amounts of charge and strain required. The inclusion of higher-order electromechanical coupling such as electrostriction ca...